Hierarchical ports will be added to the clock and counter circuits such that hierarchical pins will automatically be added when the hierarchical blocks are created.Contents 1. You will create a hierarchical design with two hierarchical blocks at the top level referencing the clock and counter circuits as seen in Figs. Your Project Manager should appear as in Fig.
Open the Mod 3 Counter project in Chapter 18, Exercise 1, and as in Step 3, copy the counter schematic to the Digital Counter Project Manager. If you did not rename SCHEMATIC1 in the Clock Oscillator to clock, select rmb > Rename. Highlight Digital Counter.dsn and press control-V. Highlight the clock schematic folder and press control-C. You will copy and paste the clock schematic folder from the Clock Oscillator Project Manager to the Digital Counter Project Manager. Place the two Project Managers side by side. Open the project Clock Oscillator from Chapter 19, Exercise 2.ģ. Create a new project Digital Counter and rename SCHEMATIC1 to Digital Counter.Ģ. PSpice can generate a hierarchical netlist such that instantiated subcircuit definitions will only appear once in the netlist.ġ. This allows different parameters to be passed to hierarchical blocks or symbols.
Parameters can be passed between levels of hierarchy using the Sub-PARAM part from the Special library. These hierarchical symbols can be saved to a library for use in other designs. A symbol is then created with the same number of signal pins and associated names. Hierarchical symbols are normally used for bottom-up designs, where the schematic is drawn first and ports are added to the input and output signals. The hierarchical blocks cannot be saved to a library as they are drawn “on the fly” and saved within the schematic file. Hierarchical blocks are normally used for top-down designs, where the block is drawn on the top-level schematic and associated signal pins are added. Different hierarchical ports are available, which represent the type of port and direction of data flow. Each schematic folder in the hierarchy will be represented by a hierarchical block in a schematic. Flat designs are represented in the Project Manager as having a single schematic folder with a number of associated pages, whereas hierarchical designs will have more than one schematic folder.
Chapter 20: Creating Hierarchical Designs.
16.1 Capture Properties for a PSpice Part.Chapter 16: Adding and Creating PSpice Models.